1. Field of the Invention
The present invention relates to an embedded memory apparatus, and more particularly, to a structure of embedded memory unit, and a system structure and operation method for the embedded memory apparatus.
2. Description of the Related Art
In recent years, due to the massive researches and development on the application of digital products, especially for the mobility of digital products, memory apparatuses have become indispensable in digital products for storing information. Accordingly, the memory apparatus must be designed to be thinner and lighter to meet the requirement of the compact size of a portable digital apparatus.
FIG. 1 schematically shows a block diagram of the system structure for a conventional embedded memory apparatus. Referring to FIG. 1, an embedded memory apparatus 100 is connected to an external digital apparatus 102, for example a personal computer (PC), via an 12C (inter-integrated circuit) USB bus interface. The embedded memory apparatus 100 comprises a serial interface 104, an ROM (read only memory) 106, a buffer unit 112 for storing a program, an application circuit 114, a micro controller unit (MCU) 108, a memory main area 110 and an information area 110a built in the memory main area 110.
After the memory apparatus 110 is initialized by the external digital apparatus 102, first, an input data is input to the serial interface 104, which converts the input data into an instruction signal. Then, the data path is divided into two different paths. In the first path, the instruction signal is directly input into the MCU 108; in the second path, the instruction signal is input into the buffer unit 112 in which a program has been stored. Then, the MCU 108 generates and provides an operation result to the application circuit 114 by running a loader-program obtained from the ROM 106 with the input data and the data to be modified. In the meantime, the program data stored in the buffer unit 112 and the loader-program provided by the application circuit 114 are both applied to burn the modified data into the addresses corresponding to the memory main area 110 in the memory apparatus 100, such that a main program for operating the memory apparatus 100 is modified and the boot sequence is totally completed.
Here, in the structure of the conventional memory apparatus 100, the loader is separately stored in an ROM 106. In the prior art, the boot sequence must write the loader into the embedded ROM, and then moves the program stored in the memory or in the buffer to a program memory area specified by the loader. Since the address decoder is required by the ROM 106 to obtain the address of the data, the size of the ROM 106 is inevitably increased due to the requirement of the address decoder. Therefore, the size of the ROM 106 is increased. In addition, the size of the decoder is greater than the size of the memory unit. Furthermore, when the bit number of the address is getting bigger, the size of the decoder is obviously increased. Accordingly, in the conventional apparatus 100 which requires a separate ROM 106 to store the loader, the large size of the ROM 106 causes a high manufacturing cost.